1. Field of the Invention
This invention relates generally to a circuit for demodulating a PSK modulated signal by differential-detection, and more particularly to such a circuit for obtaining a desired demodulated signal by converting in frequency an analog PSK modulated signal into a quasi-base band, by converting the quasi-base band signal into a digital complex signal and then by differential-detecting the digital complex signal.
2. Description of the Related Art:
Phase shift keying (PSK) is known as a typical digital modulation; if the phase of a carrier wave is changed to multiple phases (e.g., quadruple phase), then a modulated signal suitable for data transmission can be obtained.
For demodulating such a PSK modulated signal, it is currently known to convert in frequency into a quasi-base band and then to differential-detect a digital complex signal in the quasi-base band.
According to this quasi-base band frequency conversion, it is advantageous in that no accurate coincidence between a carrier frequency of the modulated signal and a local oscillation frequency generated in a receiver. This frequency difference is compensated by a subsequent phase error compensator to enable an accurate base band demodulation.
In this conventional demodulation, however, since the PSK modulated signal is processed as a digital complex signal, it requires a complicate demodulator circuit. Specifically, the circuit for differential-detecting the digital complex signal must be remarkably complicate. In addition, compensating an error of this differential-detected signal would also require a complicate circuit.
More specifically, the conventional demodulation system would encounter the following problems:
(1) Since a complex-multiplier is used, it would make the entire circuit complicate; to realize a countermeasure by hardware makes the entire circuit large in size. With the current technology level, assuming that a single complex-multiplier is constituted by general TTL integrated circuits for processing 8.times.8-bit complex data, it requires about forty integrated circuits. To constitute the complex-multiplier by specified integrated circuits, it still requires four such integrated circuits having a surface size of about 30 mm.times.80 mm.
(2) In the case of a power-saving-type digital signal processor (DSP) is used instead of the complex-multiplier, it consumes a relatively large amount of power and leads a difficulty in a high-speed demodulation. With the current technology level, when processing complex data similar to those of (1) above, the power consumption would be about 500 mW and the rate of demodulatable transmission of QPSK (Quadrature-Phase-Shift-Keying) would be about 256 kbps.